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Distinctive peculiarities of the devices «BIOMEDIS M» and «BIOMEDIS»

The distinctive feature of the devices of this series in comparison with analogues is following: the method of direct digital synthesis (DDS) of frequency is used for generation of treating signals; it allows getting high accuracy of frequency setting.

The functional scheme of the synthesizer DDS is showed on the picture 1: its main components include a stacker for value of a phase (phase accumulator), a tool for converting phase value into amplitude (it is usually a memory device, containing table with function sine values) and the Digital-to-Analogue Converter (DAC).

The scheme DDS generates sinusoidal signal, having given frequency. The output frequency is determined by two parameters: the clock signal and the binary number written in frequency register. The binary number written in the frequency register is available at the input of the phase accumulator. If the memory device, containing tabular function sine values, is used, the phase accumulator defines the address (which corresponds to instant phase value) and sends it to the input of the memory device; thus we get the current value of amplitude in digital form at the output of the memory device. Then the DAC converts the digital value into the corresponding value of voltage or current. For generating sine wave with fixed frequency a constant value (increment of phase which is determined by the binary number written in frequency register) is added to the value saved in phase accumulator with every impulse of clock signal. If value of increment is great, the phase accumulator will quickly run the table of sinuses contained in the memory device, and signal of frequency will be high. If the value of increment is low, the phase accumulator will need more steps in order to run the whole table of the memory device, and that's why the signal of frequency will be low at the output.

The Digital-to-Analogue Converter (DAC) made on the same crystal with the generation's scheme of digital counts (DDS) represents the complete integral DDS synthesizer.

Instant phase value of continuing sinusoidal signal changes cyclically within the diapason, ranging from 0 to 2?. The phase's value generates in digital form. The transfer's function which is contained in the counter allows realizing the continuing cyclic change of phase's value in the synthesizer DDS. Imagine sinusoidal oscillations in the form of vectors rotating around the wheel (picture 2) in order to understand how generation takes place! Each point on the wheel corresponds to certain point of sine wave. While vector rotates around the wheel, the value of the sine of angle is an output signal. One turnover of the vector, having constant speed, provides generation of a sine wave's period.

The phase accumulator generates angle's values, having equal increments; the value contained in the phase accumulator corresponds to certain point of the circle.

The phase accumulator represents a modulo-M counter; the value of the counter increases each time it gets a clock impulse. The value of increment is specified by the binary number M. This number determines the value of phase's increment with each clock impulse; this number actually determines the quantity of counts skipped while rotating around the wheel. The greater the step is, the more quickly the phase accumulator overflows and the shorter the period of sine wave is. Total number of possible phase values is determined by phase accumulator's resolution; and then the total number of possible phase's values determines frequency resolution of the synthesizer DDS (n). The accumulator will overflow after 228 cycles (clock impulses) for 28-bit phase accumulator, if the value M = 0000…0001. The accumulator will overflow after 2 cycles (the minimum of cycles which meet required criteria by Nyquist), if the value M = 0111…1111. This relationship is described by the following simple formula:

fout = М x fc/2^n
where:
fout is frequency of output signal of DDS;
М is the binary number which determines frequency of signal;
fc is frequency of clock signal;
n is length of the phase accumulator.

If the value M is changed, the frequency is immediately changed at the output of the synthesizer; the signal doesn't have any interruption in this case. Loop settling time doesn't take place here, as it is incurred in the case of phase-locked loop. The number of counts per once cycle decreases in case of increasing output frequency. Since the theory of counts requires at least two counts per cycle for complete reconstruction of output signal, the maximum frequency of the DDS synthesized signal is fc/2. But the practice shows that the frequency of synthesized signal is actually limited by lower value; this condition provides improvement of the synthesized signal's quality and easing of its filtering. When the signal of constant frequency is generated, the code at the output of the phase accumulator increases linearly; it corresponds to linear analog ramp signal.

The memory device, containing tabular values of sinus, is used for converting of phase accumulator's output code into instant amplitude values. Insignificant bits of 28-bit code are eliminated; we get a 10-bit code at the output of tabular memory device; the code is sent to DAC. Since the sine wave has symmetrical nature, the DDS synthesizer saves only the data of one-quarter-cycle of the sine wave. The tabular memory devices generates the complete cycle of the sine wave by reading data forward and then back.

DDS AD9832 with 32-bit phase accumulator is used in the devices "BIOMEDIS M" and "BIOMEDIS; it allows setting frequency with the following accuracy: 8 MHz / 2^32= 0,00186264514923095703125 Hz within the diapason of frequencies ranging from 0 to 4000000 Hz.

Now let examine the principle of generating treating signals by similar devices that don't use DDS. The elaborators have utilized a simple way: the way of dividing the signal of clock cycle into integer number, while using inserted timers of processor or through organizing of program divider.

For example, we want to generate a signal, having certain frequency F-output or cycle T-output through microprocessor. We can divide the clock frequency Fclock only into certain integer number n and get Foutput /n at the output.

Let see what we get in this case. If the frequency of clock generator is 5 MH:
NF-output
6437776,05
6447763,975
6457751,938
6467739,938
6477727,975
6487716,049
6497704,16
6507692,308
6517680,492
6527668,712
6537656,968
6547645,26
6557633,588
6567621,951
6577610,35
6587598,784
6597587,253
6607575,758
6617564,297
6627552,87
6637541,478
6647530,12
6657518,797
6667507,508
6677496,252
6687485,03
6697473,842
6707462,687
6717451,565
6727440,476
6737429,421
6747418,398
6757407,407
6767396,45
6777385,524
6787374,631
6797363,77
6807352,941
6817342,144
6827331,378
6837320,644
6847309,942
6857299,27
6867288,63


For example, we need the frequency = 7334 Hz (it is the second frequency by Rife in case of Chemtrail detox). As it is seen in the table above, the frequency is not included in the table. The nearest frequencies are following: 7342,144 and 7352,941 Hz. Or for example, we need to get the frequencies 7848 and 7847 Hz (the first frequencies of E-coli). The frequencies are greater; it means that the step is larger. So, we fail again.

The step of the greed approaches 0,1 Hz in case of output frequencies which are equal to about 720 Hz.

NF-output
41431206,855
41441206,564
41451206,273
41461205,982


The step of the greed approaches 0,1 Hz in case of output frequencies which are equal to about 720 Hz.

NF-output
6921722,439
6922722,3346
6923722,2302
6924722,1259
6925722,0217
6926721,9174
6927721,8132
6928721,709
6929721,6048
6930721,5007
6931721,3966
6932721,2926
6933721,1885
6934721,0845
6935720,9805
6936720,8766
6937720,7727
6938720,6688
6939720,5649
6940720,4611
6941720,3573
6942720,2535
6943720,1498
6944720,0461
6945719,9424
6946719,8388
6947719,7351


It means that the lower the frequency of generating signal is, the narrower the step of the greed is. The accuracy of 0.01 Hz is provided only in the diapason ranging till 100 Hz.

The next distinctive peculiarity of the devices "BIOMEDIS M" and "BIOMEDIS" is usage of voltage increase converter. Why is it important?

The supply voltage of the whole device should be within of certain limits for stable work of the microprocessor and graphic indicator. The voltage needed for processor should usually range from 2.7 to 5.5 volts; the voltage range for indicator should be even narrower. Thus, if two AA batteries are used for supply, the voltage range for each of them is lower than 2.7 volts. As a result, the device fails to work (or it works improperly: the processor works but the indicator doesn't reflect data; intensity of radiation falls because it is in quadratic dependence on supply voltage). The absence of the voltage increase converter doesn't allow replacing the batteries AA by rechargeable accumulators that provide saving money in case of prolonged usage of the device. The devices "BIOMEDIS M" and "BIOMEDIS" contain voltage increase converters, having the efficiency coefficient of 98% that allows supporting the voltage on the supply line of the device at the level of 5V in case of input diapason ranging from 0,8 to 6 V. The working time of the device increases till replacing of supply elements in this case; moreover, the user can be sure that stability of radiation's intensity is provided.

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